(i) Field of the Invention
The present invention relates to method of fabricating a semiconductor device, particularly to a method of fabricating a semiconductor memory device having a memory capacitor including a dielectric layer is made of a composite metal oxide.
(ii) Description of the Related Art
It is prevalent to develop semiconductor memory devices in which ferroelectric thin films made of composite metal oxides or thin films having high dielectric constant capacities made of composite metal oxides are used for the dielectric layers of memory capacitors. With miniaturization of semiconductor devices in recent years, it becomes an issue how small area the necessary capacitance of each memory capacitor is ensured by in a dynamic random access memory (DRAM) for instance. One of solutions of this problem is a method that the dielectric substance used as the dielectric layer of each memory capacitor is changed from conventional silicon oxide, silicon nitride or the like to a substance having a higher dielectric constant capacitance. It is expected that substances having high dielectric constant capacities such as SrTiO.sub.3 or ferroelectric substances such as Pb(Zr,Ti)O.sub.3 (hereinafter, called PZT) are useful for this purpose.
Besides, when a ferroelectric substance is used for the dielectric layer of each memory capacitor, a new function of non-volatility can be added to the semiconductor memory device. The dielectric layer of the ferroelectric substance has the following characteristic. When a voltage is applied to polarize the dielectric layer, the polarization does not become zero and remains even after stopping applying the voltage. By utilizing the remaining polarization, the memory device including the dielectric layer of the ferroelectric substance can be used as a non-volatile memory. The basic structure of such a ferroelectric non-volatile memory includes a MOS field effect transistor (MOSFET) and a ferroelectric capacitor in each memory cell. It has many common points in structure and manufacturing method with a general dynamic memory. Hereinafter, prior arts of the nonvolatile memories using ferroelectric substances will be described.
The structures and manufacturing methods of conventional ferroelectric memory devices are as follows.
FIG. 16 shows the structure of a conventional ferroelectric memory device disclosed by Japanese Patent Opening No. 80959/1992. As shown in FIG. 16, a MOS transistor comprises a gate electrode 15 and diffusion layers 16 in a region separated by a LOCOS insulator 24 on a silicon substrate 11. A ferroelectric capacitor comprises a lower electrode 18 made of platinum (Pt), a ferroelectric layer 19 and an upper electrode 27 made of aluminum (Al). The ferroelectric capacitor is electrically connected to one of the diffusion layers 16 of the MOS transistor through a titanium silicide layer 25. The ferroelectric layer 19 is made of PbTiO.sub.3, PZT, (Pb,La)(Zr,Ti)O.sub.3 (hereinafter, called PLZT) or the like. The transistor part, the capacitor part and wiring parts are insulated from one another by an inter-layer insulator 13 comprising two layers of silicon oxides for instance.
The ferroelectric memory of this first prior art is generally manufactured by the following process. First, the transistor is formed by the conventional manner in the region separated by the LOCOS insulator 24 on the silicon substrate 11 and the lower inter-layer insulator 132 is formed thereon. Successively, a part of the lower inter-layer insulator 132 is opened to expose one of the diffusion layers 16 of the transistor in the opening. The ferroelectric capacitor is formed on the opening portion of the lower inter-layer insulator 132 to be electrically connected to the transistor. In this prior art, a titanium layer 26 is formed in the opening and then a thermal treatment is performed. By this manner, the part of the titanium layer 26 contacting the diffusion layer 16 is silicified to obtain the titanium silicide layer 25. This is for lowering the contact resistance between the diffusion layer of the transistor and the electrode of the capacitor to be formed thereon. Next, a Pt layer to form the lower electrode 18 and, for instance, a PZT layer to form the ferroelectric layer 19 are formed in order on the titanium silicide layer 25. In this prior art, these are both formed by sputtering methods. Successively, the Pt layer and the PZT layer are patterned by a photolithographing and etching process to obtain the lower electrode 18 and the ferroelectric layer 19. After forming the upper inter-layer insulator 131, a part of it is opened by an etching process using plasma to expose the ferroelectric layer 19 in the opening. An aluminum (Al) layer is formed by sputtering so as to fill up the opening and thereby an aluminum wiring layer 27 combining the upper electrode 20 and a bit line is obtained.
As the second prior art, a ferroelectric memory device constructed as shown in FIG. 17 is used (Japanese Patent Opening No. 79266/1992). In the prior art shown in FIG. 17, a ferroelectric capacitor comprising a lower electrode 18, a ferroelectric layer 19 and an upper electrode 20 is formed at a position distant from the just upper position of a diffusion layer 16 of a transistor. The ferroelectric capacitor is electrically connected to the diffusion layer 16 through a wiring metal layer 22.
The manufacturing process of the prior art shown in FIG. 17 is as follows. The transistor 14 is formed on a silicon substrate 11 by a conventional manner. An inter-layer insulator 13 of, for instance, silicon oxide is formed. A Pt layer is first formed on the inter-layer insulator 13 by sputtering and then patterned by a photolithographing and etching process so that it remains only in a predetermined region in which the capacitor is to be formed. The lower electrode 18 is thereby formed. Similarly, a ferroelectric layer is formed on the whole area and then patterned by a photolithography process so that it remains only in the region required for forming the capacitor. The ferroelectric layer 19 is thereby formed. The ferroelectric layer 19 is then treated with heat to crystallize. The reason why the thermal treatment is performed after patterning is as follows. It becomes possible to control to the minimum the stress due to the shrinkage of the volume of the layer upon crystallization and the exfoliation of the ferroelectric layer does not occur. After that, another Pt layer is formed by sputtering and then patterned by a photolithography process so that it remains only in the region first formed on the inter-layer insulator 13 by sputtering and then patterned by a photolithographing and etching process so that it remains only in the region required for forming the capacitor. The upper electrode 20 is thereby formed. At the last, a part of the inter-layer insulator 13 is opened to expose the diffusion layer of the transistor. An aluminum layer is formed on the inter-layer insulator 13 including the opening portion and then patterned into a predetermined shape to obtain the wiring layer.
But the conventional manufacturing methods of the semiconductor devices including the ferroelectric capacitors have the following problem. There is a deterioration in reliability due to a contamination of the ferroelectric layer and a change of the composition thereof.
In the conventional manufacturing methods including the above examples, it is general to form the lower electrode, ferroelectric layer and upper electrode constituting the ferroelectric capacitor in separate apparatus. In this manner, for instance, the substrate on which the ferroelectric layer had been formed in an apparatus for forming the ferroelectric layer is once taken out in the air and then put in an apparatus for forming the upper electrode. Accordingly, the ferroelectric layer is inevitably exposed to the air between both stages so the surface of the ferroelectric layer is contaminated with floating matters in the air.
Besides, in the above prior arts, after the ferroelectric layer is formed on the whole area of the substrate, it is patterned so that only the part of it used for the capacitor remains. That is, the substrate after forming the ferroelectric layer is taken out in the air and then coated with a resist. In this case, the surface of the ferroelectric layer is contaminated not only upon being taken out in the air but also with the resist applied in the photolithography process. Although the resist is removed after completing the patterning process, it is hard completely to remove the contamination of the surface of the ferroelectric layer.
As described above, the surface of the ferroelectric layer is contaminated by exposing the substrate after forming the ferroelectric layer to the air or performing the patterning process using the resist. Similar contamination occurs also on the surface of the lower electrode. In the case that the substrate after forming the lower electrode is taken out in the air or the patterning process of the lower electrode is performed, the surface of the lower electrode is contaminated. Such contamination finally remains in the boundary surface between the ferroelectric layer and the upper or lower electrode to deteriorate the electric performance and reliability of the ferroelectric capacitor.
In addition to the above problem, there is another problem that it is easy to change the composition of the ferroelectric layer because composing elements come off from the surface of the ferroelectric layer formed.
Conventionally in the case of forming the ferroelectric layer by a sputtering method, a chemical vapor deposition (CVD) method or the like, it is general to heat the substrate to a high temperature and evacuate the reaction chamber, in which the substrate is put, after completing the formation of the ferroelectric layer. But the substrate immediately after the formation of the ferroelectric layer is still at a high temperature so elements composing the ferroelectric layer are easy to come off from the surface of the ferroelectric layer. Thus metal elements having a relatively high vapor pressure such as lead (Pb) in PZT for instance and oxygen easily come off from the surface of the ferroelectric layer and this causes a change of the composition of the surface portion.
On the other hand, there is also a case that a change of the composition of the surface portion of the ferroelectric layer is caused by a process after that. For instance, when a process such as an etching process using plasma and a forming process of the upper electrode using plasma is carried out after forming the ferroelectric layer, oxygen and so on come off from the surface of the ferroelectric layer because the surface of the ferroelectric layer is exposed to plasma. This causes a change of the composition of the surface portion of the ferroelectric layer.
Such a change of the composition of the surface portion of the ferroelectric layer also causes deterioration in electric performance and reliability of the ferroelectric capacitor.
Furthermore, in the above prior art manufacturing methods, because the layered structure is formed with plural apparatus, there is a problem that the manufacturing cost is high and the productivity is low.
Hereinabove, there were described the problems of the manufacturing methods of the semiconductor devices including the ferroelectric capacitors. Just similar problems are present in the case of semiconductor devices in which substances of composite metal oxides having high ferroelectric constant capacities are used for the capacitors.
It is an object of the present invention to provide a method and an apparatus for manufacturing a semiconductor device in which the surface of a ferroelectric layer can be prevented from being contaminated and changing the composition in the case that a ferroelectric substance of composite metal oxide or a substance of composite metal oxide having a high ferroelectric constant capacitance is used for the ferroelectric layer of a capacitor.
It is another object of the present invention to provide a method and an apparatus for manufacturing a semiconductor device with a high productivity and thereby to provide a semiconductor device of a high performance and a high reliability at a low cost.
According to the present invention, a method for manufacturing a semiconductor device which includes a capacitor made of a layered structure of a lower electrode layer, a ferroelectric layer made of a composite metal oxide and an upper electrode layer in a predetermined region on a semiconductor substrate, is characterized by comprising a step of successively forming the lower electrode layer, the ferroelectric layer and the upper electrode layer in an atmosphere isolated from the air. The step of successively forming may be followed by a patterning step in which the layered structure is processed by etching to leave the layered structure only in the region used for the capacitor. The patterning step may be followed by a step of a thermal treatment in the atmosphere of oxygen, an inert gas or a mixture of them.
In the above step of successively forming the lower electrode layer, the ferroelectric layer and the upper electrode layer, it is effective to introduce a gas in the vicinity of the substrate and keep the pressure in a predetermined range for at least the duration after completing the formation of the ferroelectric layer till starting the formation of the upper electrode layer. For such a gas to be introduced, an inert gas or a mixture of an inert gas and oxygen is desirable. The pressure of the atmosphere in the vicinity of the substrate is desirably in the range from 10.sup.-4 Torr to 10 Torr. In the case of forming the upper electrode layer by a sputtering method, it is effective that the sputtering gas contains oxygen upon starting the formation of the upper electrode layer.
The above method for manufacturing a semiconductor device is effective particularly to the case that a ferroelectric substance is used for the ferroelectric layer of the composite metal oxide. Lead titanate zirconate is usable for such a ferroelectric substance.
In the case of forming the ferroelectric layer by a sputtering method, the productivity can be improved by the manner that the formation of the ferroelectric layer is started by a low electric power and then performed with increasing the electric power.
According to the present invention, a method for manufacturing a semiconductor device which includes a ferroelectric layer made of lead titanate zirconate, is characterized in that the ferroelectric layer is formed at a substrate temperature at which lead titanate zirconate is in pyrochlore structure and then a thermal treatment is performed in the atmosphere of oxygen, an inert gas or a mixture of them at a higher temperature than the substrate temperature upon the formation of the ferroelectric layer to change the phase of lead titanate zirconate from pyrochlore structure to perovskite structure. A temperature within the range from 300.degree. C. to 550.degree. C. is suitable for the temperature for forming the ferroelectric layer. A temperature within 580.degree. C. to 800.degree. C. is suitable for the thermal treatment. This manufacturing method is more effective if it is performed with the above manufacturing method in which the layered structure of the upper electrode, ferroelectric layer and lower electrode is successively formed. In that case, it is desirable to perform the thermal treatment after the patterning process of the capacitor portion.
According to the present invention, an apparatus for manufacturing a semiconductor device, is characterized in that the apparatus comprises a substrate transfer chamber, a lower electrode formation chamber capable of transferring a substrate from and to the substrate transfer chamber, a ferroelectric layer formation chamber capable of transferring a substrate from and to the substrate transfer chamber, and an upper electrode transfer chamber capable of transferring a substrate from and to the substrate transfer chamber, and it is possible to keep the atmospheres in the substrate transfer chamber, the lower electrode formation chamber, the ferroelectric layer formation chamber and the upper electrode transfer chamber isolated from the air and to keep the atmosphere in the formation chamber in which a substrate after forming a ferroelectric layer and before forming an upper electrode is present or the substrate transfer chamber, at an oxygen pressure at which the partial pressure of a metal element composing the ferroelectric layer in the vicinity of the surface of the ferroelectric layer is not less than the equilibrium vapor pressure of the metal element.
In the manufacturing method according to the present invention, the lower electrode layer, the ferroelectric layer and the upper electrode layer are successively formed in the pure atmosphere isolated from the air. Thus, the surface of the ferroelectric layer is not exposed to the air, which may cause contamination. Besides, because the capacitor portion is patterned after forming the layered structure, it is possible to prevent the surface of the ferroelectric layer from being contaminated with a resist. Therefore, according to the method of the present invention, no contamination occurs on the boundary surface between the ferroelectric layer and the upper or lower electrode. Besides, because the layered structure can be formed in one apparatus, it is needless to transfer substrates between plural apparatus so it is possible to lower the manufacturing cost and improve the productivity.
When the atmosphere in the vicinity of the substrate is not a vacuum but kept within a fixed pressure range for the duration after completing the formation of the ferroelectric layer till starting the formation of the upper electrode, the surface portion of the ferroelectric layer can be prevented from changing the composition. If the substrate after completing the formation of the ferroelectric layer is taken out in a vacuum as it is at a high temperature, composing metal elements having high vapor pressures come off from the surface of the ferroelectric layer to change the composition of the surface portion of the erroelectric layer. This may be prevented if the partial pressure of each element composing the ferroelectric layer in the vicinity of the surface of the ferroelectric layer is so controlled as to be not less than the equilibrium vapor pressure of the element at the substrate temperature. But it is very hard to increase the partial pressure of each metal element composing the ferroelectric layer in the apparatus by introducing the element as a gas. The present invention is made by finding that substantially the same effect can easily be obtained when an ordinary gas, for instance, an inert gas is introduced in the film formation apparatus to keep the vicinity of the substrate at a constant pressure. This phenomenon is considered as follows. When the inert gas is introduced to keep the vicinity of the substrate at a constant pressure, the average free distance of the gaseous molecules in the film formation chamber including the vicinity of the surface of the substrate is shortened. Thus it becomes possible to prevent the composing elements of the ferroelectric layer from coming off from the ferroelectric layer. For the gas to be introduced, an inert gas such as argon which does not react with the composing element of the ferroelectric layer is desirable. Mixing the inert gas with oxygen is effective for preventing oxygen from coming off from the surface of the ferroelectric layer. Furthermore, in the case of forming the upper electrode by a sputtering method, by mixing oxygen with the sputtering gas in the beginning of the formation of the upper electrode, it is possible to prevent oxygen from coming off due to exposure of the ferroelectric layer to plasma upon the formation of the upper electrode. According to the above method of the present invention, it is possible to prevent the surface portion of the ferroelectric layer from changing the composition.
In the case of the ferroelectric layer of PZT, it is effective to employ a two-stage film formation method in which the substrate temperature is controlled to a low temperature upon forming the ferroelectric layer and then a thermal treatment is performed to obtain a ferroelectric phase. For obtaining a ferroelectric thin film of PZT in perovskite structure, a high substrate temperature more than about 600.degree. C. is required in general. If the ferroelectric layer is formed at such a high substrate temperature, coming-off of the composing elements of the ferroelectric layer from the surface of the ferroelectric layer after the formation of the ferroelectric layer is active as a matter of course and the change of the composition of the surface portion of the ferroelectric layer becomes large. According to the present invention, however, because the ferroelectric layer can be formed at a low substrate temperature in the extent of 300-550.degree. C., coming-off of the composing elements from the surface of the PZT film after the formation is gentle and the composition is hard to change. The PZT film formed at this condition is in pyrochlore structure showing paraelectricity. The PZT film in pyrochlore structure can be changed in phase to perovskite structure by a thermal treatment at a temperature in the extent of 580-800.degree. C. If such a thermal treatment is performed after forming the upper electrode, the change of the composition of the surface portion of the PZT film can be prevented.